The instruction LDR pc, [ r1 ] takes longer to execute on a particular system, than the instruction LDR r0, [ r1 ]. In both cases, r1 points to the same address in external memory.
Which of the following is the most likely explanation of why it takes more cycles?
A. The value read from address r1 must be passed from the data side of the processor to the instruction side
B. The LDR pc, [r1] causes the instruction pipeline to be flushed, but the LDR r0, [r1] does not
C. The LDR pc, [ r1 ] instruction requires additional alignment checking, as the result must be half word-aligned (Thumb) or word-aligned (ARM)
D. The LDR r0, [r1] can be speculatively executed, but the LDR pc, [r1] instruction cannot be speculatively executed